Four-stage CMOS amplifier: Frequency compensated using differential block

Abstract

Simple and efficient frequency compensation technique for a four-stage amplifier is presented in this study. Using a differential feedback stage and a single Miller capacitor on its output, the frequency compensation network is formed. The proposed configuration is described via matrix description. Meanwhile, an analytical transfer function is calculated. The proposed amplifier demonstrates low die occupation because of the small value of the compensation capacitor while shows acceptable frequency response regarding gain bandwidth and phase margin values. In addition, the design procedure is simple compared to the previous state-of-the-art. The HSPICE circuit simulator and TSMC 0.18 µm CMOS technology were exploited to verify theoretical presentation.