Energy-constrained scheduling of DAGs on multi-core processors

Abstract

This paper proposes a technique to minimize the makespan of DAGs under energy constraints on multi-core processors that often need to operate under strict energy constraints. Most of the existing work aims to reduce energy subject to performance constraints. Thus, our work is in contrast to these techniques, and it is useful because one can encounter numerous energy-constraint scenarios in real life. The algorithm, named Incremental Static Voltage Adaptation (ISVA), uses the Dynamic Voltage Scaling technique and assigns differential voltages to each sub-task to minimize energy requirements of an application. Essentially, ISVA is a framework, rather than yet another DAG scheduling algorithm, in that it can work with any efficient algorithm to generate the initial schedule under no energy constraints. Given the initial schedule, ISVA efficiently identifies tasks' relative importance and their liabilities on energy. It then achieves the best possible new schedule by observing its energy budget. The algorithm marginally degrades the schedule length with extensive reduction in energy budgets. © 2009 Springer Berlin Heidelberg.