Design of higher order delta segma modulator for ADC and CMOS sensors

Abstract

This paper presents a 4th-order incremental delta-sigma ADC for CMOS image sensors. The ADC employing a cascade of integrators with feed forward (CIFF) architecture uses only one operational transconductance amplifier (OTA) by sharing the OTA between 1st and 2nd stages of the modulator. by using a proposed self-biasing amplifier,which allows active signal summation at the quantizer input node without using an additional OTA, thus power and area savings are achieved. Fabricated in 90nm technology, the 4th orderdsm consumes 32.5 µW from a 1.2V supply.