Abstract
Heterogeneous package-level integration plays an increasing role in higher functional density and lower power processors for general computing, machine learning and mobile applications. This paper will review technology trends and challenges for 2.5D and 3D package-level integration with special focus on system-technology co-optimization of the die partitioning, electrical interfaces, power delivery, thermal modeling and EDA flows.
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CITATION STYLE
Lee, F. J. C., Wong, M., Tzou, J., Yuan, J., Chang, D., & Rusu, S. (2020). Heterogeneous System-Level Package Integration - Trends and Challenges. In Digest of Technical Papers - Symposium on VLSI Technology (Vol. 2020-June). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/VLSITechnology18217.2020.9265085
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