Side-wall spacer passivated sub-μm Josephson junction fabrication process

Abstract

We present a structure and a fabrication method for superconducting tunnel junctions down to the dimensions of 200 nm using i-line UV lithography. The key element is a sidewall-passivating spacer structure (SWAPS) which is shaped for smooth crossline contacting and low parasitic capacitance. The SWAPS structure enables formation of junctions with dimensions at or below the lithography-limited linewidth. An additional benefit is avoiding the excessive use of amorphous dielectric materials which is favorable in sub-Kelvin microwave applications often plagued by nonlinear and lossy dielectrics. We apply the structure to niobium trilayer junctions, and provide characterization results yielding evidence on wafer-scale scalability, and critical current density tuning in the range of 0.1-3.0 kA cm-2. We discuss the applicability of the junction process in the context of different applications, such as SQUID magnetometers and Josephson parametric amplifiers.