Analysis and optimization of Active Power and Delay of 10T Full Adder using Power Gating Technique at 45 nm Technology

Abstract

An overview of performance analysis and comparison between various parameters of a low power high speed 10T full adder has been presented here. This paper shows comparative study of advancement over active power, leakage current and delay with power supply of (0.7v) .We have achieved reduction in active power consumption of 39.20 nW and propagation delay of 10.51 ns, which makes this circuit highly energy efficient and optimization can be achieved between power and delay. In this circuit we have reduced leakage current of 18.21 nA for power supply of 0.5v to 0.9v. Signification of these designs is substance by the simulation results obtained from cadence virtuoso tool at different technologies.