Task-I/O Co-scheduling for Pfair Real-Time Scheduler in Embedded Multi-core Systems

Abstract

Real-time embedded systems often require the ability of robust controls because interactions between the embedded systems and their physical environment that dynamically changes. Multi-core chips are regarded as ideal candidate hardware components for such environments, since each of them carries two or more cores on a single die, and has potential for providing execution parallelism as well as better performance at low cost. Parallelism, on the other hand, necessitates complex analysis of computation problems, such as task scheduling, while improving the realization of embedded controls. Pfair is an optimal scheduling algorithm that can fully utilize all cores in the system, but it incurs an excessive scheduling overhead which, in turn, diminishes its practicality in embedded systems. To mitigate this problem, hybrid partitioned-global Pfair (HPGP) scheduler was proposed, which significantly reduces the number of task migrations and global scheduling points by performing global scheduling only when absolutely necessary, while still achieving full processor utilization. This paper further extends the HPGP scheduler to support the robustness to interactions with the physical environment. Our evaluation results have shown that the extended HPGP can successfully limits the increase in response time caused by the hardware interrupts for physical interactions under a wide range of system utilization conditions., thus making it suitable for embedded real-time systems.