Design of Low Power CMOS Logic Circuits Using Gate Diffusion Input (GDI) Technique

Abstract

The Gate diffusion input (GDI) is a novel technique for low power digital circuit design. This technique reduces the power dissipation, propagation delay, area of digital circuits and it maintains low complexity of logic design. In this paper, the 4×1 Multiplexer, 8×3 Encoder, BCD Counter and Mealy State Machine were implemented by using Pass Transistors (PT), Transmission Gate (TG) and Gate Diffusion Input (GDI) technique and then they were compared with each other for power dissipation. The Multiplexers and Encoders are combinational circuits and Counters and mealy machines are sequential circuits both of them are very important digital systems so power optimization should be done to those digital circuits. The whole processes for development of digital circuits and simulation was done by using the mentor graphics backend tool. This method can also be extended to the processors and other high level designs for optimization of power dissipation, area and delay in order to increase the circuit efficiency.