Low Voltage High Performance Comparator

Abstract

A comparator has been proposed using the dynamic bias concept. The proposed comparator operates on low power with minimum delay. It describes the comparison of power and delay characteristics between the dynamic bias model, elzakker circuit and two stage dynamic comparator circuits. This is achieved by enhancing the total effective transconductance with in the circuit. All these circuits were simulated at 130nm technology with a supply voltage of 1.2V.