Performance analysis of multi-rate signal processing digital filters on FPGA

Abstract

Multi-rate signal processing, an important part of the design of a digital frequency converter, is realized mainly based on interpolation and decimation, which match the sampling rate between the baseband and high-frequency processing side, especially in down conversion. However, the design of a digital filter is important for realizing multi-rate interpolation and decimation, which is highlighted in this paper. To analyze the digital filter performance in multi-rate signal processing, the ordinary finite impulse response (FIR) filter and more efficient digital filter are discussed respectively. The ordinary FIR filters use a Hamming window to design, while a more efficient digital filter includes a cascaded integrate comb (CIC) and half-band filter. Sampling rate transformation factor is 12 in this design, which is cascaded by three stages. Each stage corresponding to the conversion factor is 3, 2, and 2. Both of these design methods are implemented on the FPGA development board. The hardware resource occupancy and the error rate of the signal amplitude in decimation show that the efficient digital filter is superior to the digital filter designed by the Hamming window in the real-time processing.