On error correction capability of bit-flipping algorithm for LDPC codes

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Abstract

The error correction capability of bit-flipping decoding algorithm for low density parity-check (LDPC) codes is studied by introducing variable node adjacency (VNA) graphs which are derived from Tanner graphs of LDPC codes. For codes with column weight λ and girth g = 8, it can be shown that error patterns of weight less than or equal to λ-1 can be corrected. This result implies that the bit-flipping algorithm could decode up to the random error-correcting capability over binary symmetric channel for girth 8 codes whose random error-correcting capability is equal to λ-1. © 2011 IEEE.

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Chen, W. Y., & Lu, C. C. (2011). On error correction capability of bit-flipping algorithm for LDPC codes. In IEEE International Symposium on Information Theory - Proceedings (pp. 1283–1286). https://doi.org/10.1109/ISIT.2011.6033743

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