Optimization of thermal oxidation for 4H-SiC and fabricate/characterize MOS capacitor

Abstract

On the 4H-SiC substrate, C-face and Si-face oxide layers have been grown by thermal oxidation process and sputtering. The thermal oxidation temperature dependence of 4H-silicon carbide (SiC) is systematically investigated using capacitance-voltage (C–V) measurements. The oxidation quality and thickness vary according to the temperature and time duration of the thermal oxidation. The layers’ thicknesses are determined by atomic force microscopy (AFM), and the temperature range is between 800°C and 1110 °C. The primary reason to fabricate the Metal-Oxide-Silicon (MOS) capacitor is to know the thermal oxidation process and a working principle. In this paper, we optimize a thermal oxidation process and fabricate the MOS structure. Then we determine the various parameters such as flat band voltage (V f b ), Inversion threshold voltage (V t ), Surface depletion capacitance (C dep ), Oxide capacitance (C ox ), the total capacitance of the device (C o ), doping concentration (N d ), Depletion width (X d ), Maximum depletion width (X dt ) and Interface trap density (D it ). Finally, we analyze and discuss the MOS capacitance.