PacketMill: Toward per-Core 100-Gbps networking

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Abstract

We present PacketMill, a system for optimizing software packet processing, which (i) introduces a new model to efficiently manage packet metadata and (ii) employs code-optimization techniques to better utilize commodity hardware. PacketMill grinds the whole packet processing stack, from the high-level network function configuration file to the low-level userspace network (specifically DPDK) drivers, to mitigate inefficiencies and produce a customized binary for a given network function. Our evaluation results show that PacketMill increases throughput (up to 36.4 Gbps-70%) and reduces latency (up to 101 us-28%) and enables nontrivial packet processing (e.g., router) at ~100 Gbps, when new packets arrive >10× faster than main memory access times, while using only one processing core.

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APA

Farshin, A., Barbette, T., Roozbeh, A., Maguire, G. Q., & Kostic, D. (2021). PacketMill: Toward per-Core 100-Gbps networking. In International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS (pp. 1–17). Association for Computing Machinery. https://doi.org/10.1145/3445814.3446724

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