Diagnosis of Byzantine open-segment faults [scan testing]

Abstract

This paper addresses the problem of locating the stuck-open faults in a manufactured IC with scan flip-flops. Unlike most previous methods that only aim at identifying the faulty signals, our goal is to further narrow down the faults to a few suspected segments. With such a technique, the silicon inspection time could be dramatically slashed when the fault occurs to a long-running wire with a large number of fanouts. The algorithm is based on our previous inject-and-evaluate paradigm using symbolic simulation. It is fast and accurate. For ISCAS85 benchmark circuits with only one stuck-open fault, the first-hit index is 4.5 on the average within 10 seconds of CPU time.