Lack of correlation between C-V hysteresis and capacitance frequency dispersion in accumulation of metal gate/high- k /n-InGaAs metal-oxide-semiconductor stacks

Abstract

The correlation between capacitance-voltage hysteresis and accumulation capacitance frequency dispersion of metal gate/high-k/n-InGaAs metal-oxide-semiconductor stacks is experimentally assessed. Samples fabricated employing forming gas annealing (FGA) or substrate air exposure to obtain different densities of defects were thoroughly characterized and the results were compared with previous literature on the topic. Results indicate a lack of correlation between capacitance-voltage hysteresis and accumulation capacitance dispersion with frequency, suggesting that defects with remarkably different kinetics are involved in each phenomenon. This is assessed through the dependence of the capacitance-voltage hysteresis with DC bias and stress time, observing that permanent interface defect depassivation under bias has no effect on the hysteresis width after stress. Overall, capacitance-voltage hysteresis probes slow trapping mechanisms throughout the oxide and the bandgap, which are consistent with the negative charge trapping characteristic of the current-time curves for FGA samples at constant voltage stress. Instead, accumulation capacitance frequency dispersion probes defects with short trapping/detrapping characteristic times that can be linked to the stress induced leakage current of air exposed samples under constant DC stress. Experimental results indicate that each effect must be assessed separately due to the large difference in the kinetics of the probed defects.