Study of Drain Induced Barrier Lowering(DIBL) effect for strained Si nMOSFET

Abstract

Drain Induced Barrier Lowering(DIBL) effect is prominent as the feature size of MOS device keep diminishing. In this paper, a threshold voltage model for small-scaled strained Si nMOSFET is proposed to illustrate the DIBL effect, which is based on solving 2-D Poisson equation. By simulation, the relationship between DIBL and channel length, gate oxide thickness, Ge content, and channel doping concentration has been analyzed and the way to restrain the DIBL effect has been acquired. By using ISETCAD device simulator, the validity of the model has also been proved. © 2010 Published by Elsevier Ltd.